With the advent of low-cost computing capacity, computers and processor-based systems have found their way into numerous environments and applications. Computers and processor-based systems can be found in contemporary offices, plants, homes and other facilities. As the popularity of computer systems increases and new utility is found for their application, market forces tend to result in an increase in computing power at a given cost point. This is a result of new innovations to meet market demands for more processing power, and economies of scale associated with high-volume production.
To meet market demands for faster computing, system designers have enhanced almost every aspect of processor-based systems. One area of enhancement is in processor communications. For example, the IBM 3746 Expansion Unit Model 900 High-Performance Parallel Bus (HPPB) structure was developed to provide high speed communications among processor devices. The IBM 3746 Expansion Unit Model 900 is available from International Business Machines corporation in La Gaude, France. The HPPB bus allows high-speed parallel transfer of data among CPUs (central processing units), memories, disk drives, external interfaces and other I/O, and the like.
An additional development associated with the widespread use of processor-based systems was the evolution of communications techniques whereby distinct processors in multiple locations can communicate with one another. One such technique involves the use of Local Area Networks (LANs) to allow processors to share data with each other. To accomplish this sharing of data, computers send data to one another across the LAN. The data is packaged for transmission into packets. Interfacing a processor to the LAN is accomplished using a device called a LAN controller.
Typical LAN controllers can be characterized as having a transfer rate that is quite slow as compared to the HPPB bus. This can generally be attributed to the large amount of overhead associated with typical LAN controllers. Because of this rate differential, interfacing an HPPB bus-based system to a LAN can have an adverse impact on the performance of the HPPB system. When a LAN controller transfers data to or from the HPPB bus, its inefficiencies result in a communications exchange that "ties up" the HPPB bus for a period of time that is longer than desired. This prohibits the HPPB bus from allowing other data transfers during this time. Because the HPPB bus is capable of executing the transfers in a shorter period of time, the LAN controller is a limiting factor to HPPB performance.
To overcome this rate differential problem, system designers have developed and implemented a communications adapter. The communications adapter is essentially a rate buffer. Data transferred from the HPPB bus at a higher rate is buffered in the communications adapter and then transferred to the LAN controller at the controller's lower data rate. Similarly, data transferred from the LAN controller is accepted and buffered at the LAN controller's lower data rate. When all the data (or a large block thereof) is buffered, the communications adapter transfers it onto the HPPB bus at the higher rate. Thus the HPPB bus is not limited to operating at the LAN controller's lower data rate.
Communications adapters are not restricted for use in interfacing a high speed bus to a lower speed LAN as discussed above. Communications adapters can be used to interface any bus or network operating at a given speed to any device operating at a different interface data rate. In this patent document, the communications adapter is described as providing an interface to the device via a "communications channel."
One limitation with the conventional communications adapter is that it does not allow for efficient transfer of control, status, diagnostic information and/or other data along with data transfers. When a processor wants to exchange this control, status, diagnostic information, and/or other data across the communications adapter it has to request and be granted access to the bus to allow the transfer to occur. This requires arbitration for and a change in bus ownership and usually results in wasted bus cycles.
In this document, the term "supplemental data" is used to generally describe control, status, diagnostic information, and/or other data to be interleaved with a current data transfer.
Additionally, the term "unit" used in conjunction with data defines a unit of data to be transferred. A unit of data can refer to a half word, a full word, a byte, or any other grouping of bits or bytes.
What is needed, then, is a system and method for interfacing a conventional slave controller to a high speed master bus, where the system allows interleaving of supplemental data transfer cycles with data burst cycles. The ideal solution will be such that the interface bus is fully utilized and errors during burst data cycles do not interfere with the operation of the supplemental data path.